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SoC Integration_ Design Pr. Engineer

SoC Integration_ Design Pr. Engineer

Hands-on, team-oriented and self-motivated digital design engineer. In this role, the engineer will be responsible for SoC flow
integration.
DETAIL
Responsibilities:
1) Work closely with DFT/Back End teams to participate in chip development.
2) Run full suite of ASIC design tools (lint/CDC checking, DFT, synthesis, timing closure, formal verification, CLP checking, etc.).

Qualifications & Requirements:
1) MSCS/MSEE degrees (10+) years of digital design experience.
2) Experience in SoC design or CAD – Synthesis, DFT, STA, and CLP check.
3) Hands on experience in constraint development and timing closure.
4) Understanding of power intent (UPF) and timing constraints is a must.
5) Familiar with digital design is a plus.